PART 8085A
 FAMILY REALCHIP
 POWER_PINS (VCC:40;GND:20)
PIN
 READY         (35)       INPUT   (-0.01,0.01)
 HOLD          (39)       INPUT   (-0.01,0.01)
 INTR          (10)       INPUT   (-0.01,0.01)
 RST_5.5       (9)        INPUT   (-0.01,0.01)
 RST_6.5       (8)        INPUT   (-0.01,0.01)
 RST_7.5       (7)        INPUT   (-0.01,0.01)
 TRAP          (6)        INPUT   (-0.01,0.01)
 RESET_IN*     (36)       INPUT   (-0.01,0.01)
 X1            (1)        INPUT   (-0.01,0.01)
 X2            (2)        INPUT   (-0.01,0.01)
 SID           (5)        INPUT   (-0.01,0.01)
 AD<7>         (19)       TS      (-0.01,0.01)   (2.0,-0.4)   BIDIR
 AD<6>         (18)       TS      (-0.01,0.01)   (2.0,-0.4)   BIDIR
 AD<5>         (17)       TS      (-0.01,0.01)   (2.0,-0.4)   BIDIR
 AD<4>         (16)       TS      (-0.01,0.01)   (2.0,-0.4)   BIDIR
 AD<3>         (15)       TS      (-0.01,0.01)   (2.0,-0.4)   BIDIR
 AD<2>         (14)       TS      (-0.01,0.01)   (2.0,-0.4)   BIDIR
 AD<1>         (13)       TS      (-0.01,0.01)   (2.0,-0.4)   BIDIR
 AD<0>         (12)       TS      (-0.01,0.01)   (2.0,-0.4)   BIDIR
 A<15>         (28)       TS      (-0.01,0.01)   (2.0,-0.4)
 A<14>         (27)       TS      (-0.01,0.01)   (2.0,-0.4)
 A<13>         (26)       TS      (-0.01,0.01)   (2.0,-0.4)
 A<12>         (25)       TS      (-0.01,0.01)   (2.0,-0.4)
 A<11>         (24)       TS      (-0.01,0.01)   (2.0,-0.4)
 A<10>         (23)       TS      (-0.01,0.01)   (2.0,-0.4)
 A<9>          (22)       TS      (-0.01,0.01)   (2.0,-0.4)
 A<8>          (21)       TS      (-0.01,0.01)   (2.0,-0.4)
 ALE           (30)       OUTPUT  (2.0,-0.4)
 IO            (34)       TS      (-0.01,0.01)   (2.0,-0.4)
 S<1>          (33)       OUTPUT  (2.0,-0.4)
 S<0>          (29)       OUTPUT  (2.0,-0.4)
 RD*           (32)       TS      (-0.01,0.01)   (2.0,-0.4)
 WR*           (31)       TS      (-0.01,0.01)   (2.0,-0.4)
 HLDA          (38)       OUTPUT  (2.0,-0.4)
 INTA*         (11)       OUTPUT  (2.0,-0.4)
 RESET_OUT     (3)        OUTPUT  (2.0,-0.4)
 CLK           (37)       OUTPUT  (2.0,-0.4)
 SOD           (4)        OUTPUT  (2.0,-0.4)
END
